The purpose of this document is to describe how to perform various calibration processes on the i.MX53 Enhanced DRAM Controller (ESDCTL) for use with DDR3 and??LPDDR2 memories. These calibration
The purpose of this document is to describe how to perform various calibration processes on the i.MX53 Enhanced DRAM Controller (ESDCTL) for use with DDR3 and??LPDDR2 memories. These calibration
12/16 16:38
12/16 15:51
12/16 15:20
12/16 14:13
10/26 09:45
10/26 09:41
10/26 09:38
10/25 09:39
10/24 13:38
10/24 13:37
10/24 13:36
10/24 13:33
10/24 13:04
10/24 13:01
10/24 13:00
10/24 13:00
10/24 13:00
10/24 12:58
10/24 12:58
10/24 12:53