This document briefly describes the NXP recommended software changes to better align the duty cycle of the DRAM_SDCLK0 and DRAM_SDCLK1 on the i.MX 6Quad/6Dual SoCs with JEDEC standards.
This document briefly describes the NXP recommended software changes to better align the duty cycle of the DRAM_SDCLK0 and DRAM_SDCLK1 on the i.MX 6Quad/6Dual SoCs with JEDEC standards.
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