|
目录:
1 Introduction
2 A little bit on jitter
2.1 Sampling jitter
2.1.1 Audibility of sample-jitter
2.1.2 Sample jitter susceptibility of DACs
2.1.2.1 Nyquist-DACs
2.1.2.2 Oversampled DACs
2.1.2.3 Delta-sigma modulators
2.1.2.4 Jitter modulation of the sampling clock
2.2 Interface jitter
2.2.1 The AES3/SP-DIF-interface; a cautionary tale
2.3 Measurement of jitter
2.3.1 Intrinsic jitter in device under test
2.3.2 Measurement of jitter transfer function
2.3.3 Data-jitter susceptibility; the J-test
2.4 So now that we know, what can we do about it?
3 The ups and downs of sample-rate conversion
3.1 The sampling process
3.2 Sample rate conversion – the concept
3.3 A short review of oversampling and undersampling
3.4 The arbitrary sample-rate converter
3.5 Requirements for the AASRC
3.5.1 Oversampling ratio L
3.5.2 The oversampling filter
3.5.3 Hold on a moment:
3.6 The frequency tracking unit
3.7 AASRCs and jitter
3.8 Summary:
4 Quantization and dithering; the noise trade
4.1 Bennett’s additive noise approximation
4.2 The characteristic function method
4.2.1 Undithered quantization
4.2.2 Dithered quantization
4.2.3 The dither signal:
4.2.4 Some dither myths resolved:
4.2.5 The output spectrum of the quantizer
4.2.5.1 Non-sampled signals:
4.2.5.2 Sampled signals:
5 The delta-sigma modulator
5.1 The functionality of delta-sigma modulators
5.2 Delta-sigma modulator issues
5.2.1 Idle tone behaviour
5.2.2 Quantizer overloading
5.2.3 Modulator stability
5.3 Multi-loop (MASH) modulators
5.4 Arbitrary NTFs and STFs; optimizing the modulator
5.5 Summary
6 The DAC and dynamic element matching
6.1 Why multibit?
6.2 How multibit
6.3 Get that mismatch in shape
6.4 Second order element dynamic element matching
7 Current State-of-the-Art
7.1 A Stereo 24-bit Audio DAC with 120dB Dynamic Range.
7.1.1 Solutions:
7.1.2 Performance:
7.2 A 126dB DR Current-mode Advanced Segmented DAC
7.2.1 Solutions:
7.2.2 Performance:
7.3 A 120dB Multi-Bit SC Audio DAC with Second-Order Noise Shaping
7.3.1 Solutions:
7.3.2 Performance:
7.4 Design and Evaluation of an Audio DAC with Non-Uniformly Weighted
Dynamic Element Matching
7.4.1 Solutions:
7.4.2 Performance:
7.5 A 128fs, Multi-bit ΣΔ CMOS Audio DAC with Real-time DEM and 115dB
SFDR
7.5.1 Solutions:
7.5.2 Performance:
7.6 A 110dB Ternary PWM Current-Mode Audio DAC with Monolithic 2Vrms
Driver
7.6.1 Solutions:
7.6.2 Performance:
7.7 State-of-the-art DACs in the market:
8 Summary
9 References
A Appendix 1: Relevant statistics
A.1 Random variables and probability distributions
A.2 Statistical expectation
A.3 Dependence and correlation
A.4 Autocorrelation, power-spectrum and characteristic function
B Appendix 2: Bessel-function of the first kind
|
|