The thesis demonstrates a low-cost, low-bandwidth and low-resolution Analog-to-Digital Converter(ADC) in 0.35 um CMOS Process. A second-order Sigma-Delta modulator is used as the basis of the A/D Converter. A Semi-Uniform quantizer is used with the
modulator to take advantage of input distributions that are dominated by smalleramplitude signals e.g. Audio, Voice and Image-sensor signals. A Single-bit feedback topology is used with a multi-bit quantizer in the modulator. This topology avoids the use of a multi-bit DAC in the feedback loop – hence the system does not need to use digital correction techniques to compensate for a multi-bit DAC non-linearity. This attribute of the of the A/D Converter contributes to the low-cost aspect.