A Single Chip 2.5 Gbps CMOS Burst Mode Optical Receiver

caroline11

Abstract—This paper describes the design of a 2.5 Gbps burst-mode optical receiver in a 0.18 μm CMOS process. A dual gain mode TIA with constant damping factor control is proposed to tolerate wide dynamic range input signal. Incorporating automatic level tracking circuit (ATC), the TIA and limiting amplifier are DC coupled with feed-forward offset cancellation. Dual band filters are adopted in the ATC for a rapid response time while keeping the tracking error small. Integrating both transimpedance amplifier and post limiting amplifier in a single chip, the burst mode receiver provides a conversion gain of 106 dBin the high gain mode, 97 dBinthelowgainmode, and a -3 dB bandwidth of 1.85 GHz. The measured input sensitivity, overload level, and dynamic range of the optical receiver are -19 dBm, -2 dBm, and 17 dB respectively. The response time is less than 50 ns. Operating under a single 1.8 V supply, this chip dissipates only 122 mW.