美资上海LSI公司高薪诚聘 Design Verification Engineer

asic_tapeout

美资上海LSI公司高薪诚聘

工作地点在上海徐汇区徐汇苑大厦，附近有轨道交通1，3，4号线站点，交通方便。
部门内部推荐，请发送简历至 asic_tapeout@hotmail.com
Design Verification Engineer                                     
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
- Duties will include working within a Product Development Team to develop reusable block-level and ASIC test benches using
HVL.
- Develop new ASIC verification environments to support ASIC development.
- Maintain existing ASIC verification environments.
- Review RTL architectural and implementation specifications.
- Create stimulus drivers, monitors, dataflow models, and test plans to verify function and performance of advanced
multiprotocol networking ASICs.
- Define and develop application tests required to verify ASICs meet functional and performance goals.
- Define and implement functional coverage plans.
- Define and implement code coverage plans.
- Develop testing and regression methodologies for new verification flow.
- Coordinate test plan implementation and regressions with remote team.
- Incorporate reusability into all aspects of the verification environment.
- Develop/maintain/enhance environment tools/scripts/makefiles.
PREFERRED EXPERIENCE:
- Minimum of 4-6 years ASIC Verification experience in a product development environment
- Proven ASIC Design Verification skills
- Fluent in Verilog for design verification
- Experience with Specman or System Verilog
- Knowledge of data and telecommunication networking(TDM/IP/ATM/Ethernet)
- Experience with one or more scripting languages: awk, Perl, python
- Superior debugging skills for large ASIC designs
- Strong written and verbal communication skills
- Adaptable to evolving customer requirement
- Desired: Past experience in a lead position giving guidance to other engineers; Experience with C/C++
Education/Certifications
Required Degree: BS
Preferred Degree: MS
Preferred Major: Electrical Engineering or related discipline