NIOS II 的定时器

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NIOS II 的定时器

保研的日子的确有些懒散,索性就申请个博客来分享一些嵌入式方面的话题,共同探讨,共同进步. 作为开题,我首先想说说我对NIOS II 的定时器的理解. 如果你对单片机熟悉的话,那么NIOS II的定时器会很简单的理解,并很好的应用.定时器模块是NIOS 开发工具包的一个库组件,其可用于周期脉冲发生器或看门狗定时器.记得当时参加NIOS 竞赛的时候发现很多的资料不仅老,而且少,所以我这里先把一些关键寄存器说一下(想到哪,说到哪,有点乱) NIOS 定时器模块是32位的内部定时器,以下寄存器均为16位.              寄存器名    status  位0 :   to位,内部计时器为0时,to 位置1                                               位1:   run位,内部计时器运行时,run位置1,否则0                                  control 位0:  ito 位,如果该位置1,则当状态寄存器的to 位置1(定时器溢出),计时器发出中断请求.若其置0,则不产生中断.                                               位1: cont 位 内部计时器为0时,,计时器重载preiodl和preiodh,若cont 为1,则定时器连续计时,只有写stop位停止,若cont 为0,则重载初值后,停止计时.                                              位2: start 见名知意                                              位3: stop 见名知意                                  periodl   计数器低16位                                  periodh  计数器高16位                                  snapl     计数器捕捉寄存器(读地位状态)                                  snaph    计数器捕捉寄存器(读高位状态) 对nios中的定时器的具体功能设定可以通过SOPC中进行相应勾选 若需要watch dog的话,则在SOPC中选择Timer,在Preset configration选择 watch dog 关于对看门狗的具体设置,则在头文件system.h中加以修改,具体如下: #define WATCH_DOG_NAME "/dev/watch_dog" #define WATCH_DOG_TYPE "altera_avalon_timer" #define WATCH_DOG_BASE 0x00001020 #define WATCH_DOG_SPAN 32 #define WATCH_DOG_IRQ 0 #define WATCH_DOG_ALWAYS_RUN 1 #define WATCH_DOG_FIXED_PERIOD 1 #define WATCH_DOG_SNAPSHOT 0 #define WATCH_DOG_PERIOD 1 #define WATCH_DOG_PERIOD_UNITS "ms" #define WATCH_DOG_RESET_OUTPUT 1 #define WATCH_DOG_TIMEOUT_PULSE_OUTPUT 0 #define WATCH_DOG_MULT 0.001 #define WATCH_DOG_FREQ 50000000 若应用为计时器的话,则关于在NIOS IDE中的具体编程,在头文件 include "altera_avalon_timer_regs.h"中定义了所有的寄存器的地址,通过IOWR IORD等指令可以很方面的进行定时器的设计 /****************************************************************************** *                                                                             * * License Agreement                                                           * *                                                                             * * Copyright (c) 2003 Altera Corporation, San Jose, California, USA.           * * All rights reserved.                                                        * *                                                                             * * Permission is hereby granted, free of charge, to any person obtaining a     * * copy of this software and associated documentation files (the "Software"),  * * to deal in the Software without restriction, including without limitation   * * the rights to use, copy, modify, merge, publish, distribute, sublicense,    * * and/or sell copies of the Software, and to permit persons to whom the       * * Software is furnished to do so, subject to the following conditions:        * *                                                                             * * The above copyright notice and this permission notice shall be included in  * * all copies or substantial portions of the Software.                         * *                                                                             * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  * * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    * * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      * * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     * * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         * * DEALINGS IN THE SOFTWARE.                                                   * *                                                                             * * This agreement shall be governed in all respects by the laws of the State   * * of California and by the laws of the United States of America.              * *                                                                             * ******************************************************************************/ #ifndef __ALTERA_AVALON_TIMER_REGS_H__ #define __ALTERA_AVALON_TIMER_REGS_H__ ＃i nclude /* STATUS register */ #define ALTERA_AVALON_TIMER_STATUS_REG              0 #define IOADDR_ALTERA_AVALON_TIMER_STATUS(base) \   __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_STATUS_REG) #define IORD_ALTERA_AVALON_TIMER_STATUS(base) \   IORD(base, ALTERA_AVALON_TIMER_STATUS_REG) #define IOWR_ALTERA_AVALON_TIMER_STATUS(base, data) \   IOWR(base, ALTERA_AVALON_TIMER_STATUS_REG, data) #define ALTERA_AVALON_TIMER_STATUS_TO_MSK           (0x1) #define ALTERA_AVALON_TIMER_STATUS_TO_OFST          (0) #define ALTERA_AVALON_TIMER_STATUS_RUN_MSK          (0x2) #define ALTERA_AVALON_TIMER_STATUS_RUN_OFST         (1) /* CONTROL register */ #define ALTERA_AVALON_TIMER_CONTROL_REG             1 #define IOADDR_ALTERA_AVALON_TIMER_CONTROL(base) \   __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_CONTROL_REG) #define IORD_ALTERA_AVALON_TIMER_CONTROL(base) \   IORD(base, ALTERA_AVALON_TIMER_CONTROL_REG) #define IOWR_ALTERA_AVALON_TIMER_CONTROL(base, data) \   IOWR(base, ALTERA_AVALON_TIMER_CONTROL_REG, data) #define ALTERA_AVALON_TIMER_CONTROL_ITO_MSK         (0x1) #define ALTERA_AVALON_TIMER_CONTROL_ITO_OFST        (0) #define ALTERA_AVALON_TIMER_CONTROL_CONT_MSK        (0x2) #define ALTERA_AVALON_TIMER_CONTROL_CONT_OFST       (1) #define ALTERA_AVALON_TIMER_CONTROL_START_MSK       (0x4) #define ALTERA_AVALON_TIMER_CONTROL_START_OFST      (2) #define ALTERA_AVALON_TIMER_CONTROL_STOP_MSK        (0x8) #define ALTERA_AVALON_TIMER_CONTROL_STOP_OFST       (3) /* PERIODL register */ #define ALTERA_AVALON_TIMER_PERIODL_REG             2 #define IOADDR_ALTERA_AVALON_TIMER_PERIODL(base) \   __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_PERIODL_REG) #define IORD_ALTERA_AVALON_TIMER_PERIODL(base) \   IORD(base, ALTERA_AVALON_TIMER_PERIODL_REG) #define IOWR_ALTERA_AVALON_TIMER_PERIODL(base, data) \   IOWR(base, ALTERA_AVALON_TIMER_PERIODL_REG, data) #define ALTERA_AVALON_TIMER_PERIODL_MSK             (0xFFFF) #define ALTERA_AVALON_TIMER_PERIODL_OFST            (0) /* PERIODH register */ #define ALTERA_AVALON_TIMER_PERIODH_REG             3 #define IOADDR_ALTERA_AVALON_TIMER_PERIODH(base) \   __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_PERIODH_REG) #define IORD_ALTERA_AVALON_TIMER_PERIODH(base) \   IORD(base, ALTERA_AVALON_TIMER_PERIODH_REG) #define IOWR_ALTERA_AVALON_TIMER_PERIODH(base, data) \   IOWR(base, ALTERA_AVALON_TIMER_PERIODH_REG, data) #define ALTERA_AVALON_TIMER_PERIODH_MSK             (0xFFFF) #define ALTERA_AVALON_TIMER_PERIODH_OFST            (0) /* SNAPL register */ #define ALTERA_AVALON_TIMER_SNAPL_REG               4 #define IOADDR_ALTERA_AVALON_TIMER_SNAPL(base) \   __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_SNAPL_REG) #define IORD_ALTERA_AVALON_TIMER_SNAPL(base) \   IORD(base, ALTERA_AVALON_TIMER_SNAPL_REG) #define IOWR_ALTERA_AVALON_TIMER_SNAPL(base, data) \   IOWR(base, ALTERA_AVALON_TIMER_SNAPL_REG, data) #define ALTERA_AVALON_TIMER_SNAPL_MSK               (0xFFFF) #define ALTERA_AVALON_TIMER_SNAPL_OFST              (0) /* SNAPH register */ #define ALTERA_AVALON_TIMER_SNAPH_REG               5 #define IOADDR_ALTERA_AVALON_TIMER_SNAPH(base) \   __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_TIMER_SNAPH_REG) #define IORD_ALTERA_AVALON_TIMER_SNAPH(base) \   IORD(base, ALTERA_AVALON_TIMER_SNAPH_REG) #define IOWR_ALTERA_AVALON_TIMER_SNAPH(base, data) \   IOWR(base, ALTERA_AVALON_TIMER_SNAPH_REG, data) #define ALTERA_AVALON_TIMER_SNAPH_MSK               (0xFFFF) #define ALTERA_AVALON_TIMER_SNAPH_OFST              (0) #endif /* __ALTERA_AVALON_TIMER_REGS_H__ */ 先说到这里,实验室要锁门了,写了一些没有头绪的东西,全当是抛砖引玉了,有不对的地方,请不吝赐教,希望本篇能对初学者有一些帮助,以后我会继续写一些NIOS 的东西与大家分享