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Si5317 时钟定时开发工具

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    2013-9-2 09:06
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    [LV.3]偶尔看看II

    发表于 2014-11-5 09:57:17 | 显示全部楼层 |阅读模式
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    Silicon Labs Si5317 时钟和定时器开发工具,第三代 DSPLL,超低jitter。Si5317评估板提供一个完整和简单的平台评估Si5317-EVB的特性和性能。The Si5315 Synchronous Ethernet/Telecom jitter attenuating clock multiplier has a comprehensive feature set, including any-rate frequency synthesis,multiple clock inputs, multip le clock outputs, alarm and status outputs, hitless switching between input clocks, and programmable output clock signal format (LVPECL,LVDS, CML, CMOS). For more details, consult theSilicon Labs timing products website at:www.silabs.com/timing.
    TheSi5315-EVB has two differential clock input and output ports that are AC terminated to 50 ohms and then AC coupled to the Si5315. The XA-XB reference is usually a 40 MHz crystal; however, there are provisions for an external XA-XB reference clock (either differential or single ended).
    The evaluation board (EVB) can be powered using two different approaches: external power supplies or by
    USB. Jumper plugs are provided to select between these two options. Jumper plugs are used to strap the device pins for the various pin value options. Status outputs are available on a ribbon connector header. SMA connectors are used for the clock input, output, and XA-XB reference signals.
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