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CDCLVC1310评估模块

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    奋斗
    2014-7-16 09:10
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    [LV.8]以坛为家I

    发表于 2014-3-21 15:17:17 | 显示全部楼层 |阅读模式
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    CDCLVC1310是一个高度灵活的,低抖动和低功耗时钟扇出缓冲器,其中分布最多十个低抖动LVCMOS时钟输出。DescriptionThe CDCLVC1310 is a highly versatile, low jitter and low power clock fan out buffer, which distributes up to ten low jitter LVCMOS clock outputs. The clock is derived from one of three inputs, whose primary and secondary inputs feature differential or single-ended signals and the third input is a crystal input. Features
             
    • Easy-to-use evaluation board to fan out low phase-noise clocks       
    • Easy device setup       
    • Fast configuration       
    • Control pins configurable through jumpers       
    • Board powered at 2.5-/3.3-V for VDD and at 1.5-/1.8-/2.5-/3.3-V for VDDO       
    • Single-ended or differential input clocks or crystal input

    CDCLVC1310.pdf

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    CDCLVC1310-EVM.pdf

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