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AD9640是一个双14位的80/105/125/150 MSPS模数转换器（ADC）。The AD9640 is designed to support communications applications where low cost, small size, and versatility are desired. The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.产品特性
- SNR = 71.8 dBc (72.8 dBFS) to 70 MHz @ 125 MSPS
- SFDR = 85 dBc to 70 MHz @ 125 MSPS
- Low power: 750 mW @ 125 MSPS
- SNR = 71.6 dBc (72.6 dBFS) to 70 MHz @ 150 MSPS
- SFDR = 84 dBc to 70 MHz @ 150 MSPS
- Low power: 820 mW @ 150 MSPS
- 1.8 V analog supply operation
- 1.8 V to 3.3V CMOS output supply or 1.8 V LVDS output supply
- Integer 1 to 8 input clock divider
- IF sampling frequencies to 450 MHz
- Internal ADC voltage reference
- Integrated ADC sample-and-hold inputs
- Flexible analog input range: 1 V p-p to 2 V p-p
- Differential analog inputs with 650 MHz bandwidth
- ADC clock duty cycle stabilizer
- 95 dB channel isolation/crosstalk
- Serial port control
- User-configurable, built-in self-test (BIST) capability
- Energy-saving power-down modes
- Integrated receive features
——Fast detect/threshold bits ——Composite signal monitor典型应用
- Communications
- Diversity radio systems
- Multimode digital receivers
——GSM, EDGE, WCDMA, LTE, ——CDMA2000, WiMAX, TD-SCDMA
- I/Q demodulation systems
- Smart antenna systems
- General-purpose software radios
- Broadband data applications
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发表于 2013-7-19 17:43:53
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