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Arria V FPGA RF开发板

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    [LV.3]偶尔看看II

    发表于 2012-9-19 17:55:37 | 显示全部楼层 |阅读模式
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    Altera® Arria® V FPGA RF开发板提供了一个完整的设计环境,包含开发RF自适应算法和测试的所有硬件和软件。此开发套件符合RoHS认证。The development kit features the following boards:Arria V GX FPGA Development Kit
             
    • Two FPGAs for system level design       
    • Arria V GX—360KLE, F1517 package, 24X6G XCVRs, C6 speed grade       
    • Three I/O expansion slots—Two high-speed mezzanine cards (HSMCs) and one FMC       
    • 2 GB of SDRAM memory, 4.5 MB of QDR II memory, and 512 MB of flash memory       
    • Display port and SFP+ connections       
    • SMAs and the new Samtec Bullseye       
    • Amphenol® connectors for signal integrity (SI) and backplane measurements       
    • Ability to measure individual power rails on each chip
    Texas Instruments Development Kits
             
    • TSW30H84EVM, a complete RF transmit reference design, which includes the DAC34H84, the industry’s lowest-power 4-channel, 16-bit digital-to-analog converter (DAC) at 1.25 GSPS.       
    • TSW1266EVM, a digital pre-distortion feedback reference design.       
    • TSW1265EVM, a wideband dual-receiver reference design, which includes the ADS4249, the industry’s lowest-power dual-channel, 14-bit analog-to-digital converter (ADC).       
    • TSW3065EVM, a standalone local oscillator source designed with the TRF3765 integer or fractional phase-locked loop (PLL) and voltage-controlled oscillator (VCO).       
    • HSMC-ADC-Bridge and ArriaV-TI-Adapter to interface between TI and Altera hardware.
    Figure 1. Arria V GX FPGA Development Kit Block Diagram
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