本帖最后由 XM明 于 2013-5-8 10:02 编辑
简介：
Keil 公司的MCBSTR9 评估板适用于ST 公司的STR91xMCU 系列，用来产生和测试应用程 序，包括了单片STR9 系统的所有硬件元件，以开发目前和未来的产品。本文介绍了ST 公 司的STR91xFAxxx 主要特性，方框图以及MCBSTR9 评估板主要特性，方框图，技术数据和电路图。 STR91xFAxxx ： ARM966E-S? 16/32-bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA STR91xFA is a series of ARM-powered microcontrollers which combines a 16/32-bit ARM966E-S RISC processor core, dual-bank Flash memory, large SRAM for data or code, and a rich peripheral set to form an ideal embedded controller for a wide variety of applications such as point-of-sale terminals, industrial automation, security and surveillance, vending machines, communication gateways, serial protocol conversion, and medical equipment. The ARM966E-S core can perform single-cycle DSP instructions, good for speech processing, audio algorithms, and low-end imaging. The STR91xFA is a SiP device, comprised of two stacked die. One die is the ARM966E-S CPU with peripheral interfaces and analog functions, and the other die is the burst Flash. The two die are connected to each other by a custom high-speed 32-bit burst memory interface and a serial JTAG test/programming interface. STR91xFAxxx 主要特性：
■ 16/32-bit 96 MHz ARM9E based MCU
– ARM966E-S RISC core: Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories
(SRAM and Flash)
– STR91xFA implementation of core adds high-speed burst Flash memory interface, instruction
prefetch queue, branch cache
– Up to 96 MIPS directly from Flash memory
– Single-cycle DSP instructions supported
– Binary compatible with ARM7 code
■ Dual burst Flash memories, 32-bits wide
– 256 KB/512 KB/1 MB/2 MB main Flash
– 32 KB/128 KB secondary Flash
– Sequential Burst operation up to 96 MHz
– 100 K min erase cycles, 20 yr min retention
■ SRAM, 32-bits wide
– 64K or 96K bytes, optional battery backup
■ 9 programmable DMA channels
■ Clock, reset, and supply management
– Internal oscillator operating with external 4-25 MHz crystal
– Internal PLL up to 96 MHz
– Real-time clock provides calendar functions, tamper, and wake-up functions
– Reset Supervisor monitors supply voltage, watchdog, wake-up unit, external reset
– Brown-out monitor
– Run, Idle, and Sleep Mode as low as 50 uA
■ Vectored interrupt controller (VIC)
– 32 IRQ vectors, 30 interrupt pins
– Branch cache minimizes interrupt latency
■ 8-channel, 10-bit A/D converter (ADC)
– 0 to 3.6 V range, 0.7 usec conversion
■ 10 Communication interfaces
– 10/100 Ethernet MAC with DMA and MII
– USB Full-speed (12 Mbps) slave device
– CAN interface (2.0B Active)
– 3 16550-style UARTs with IrDA protocol
– 2 Fast I2C?, 400 kHz
– 2 channels for SPI?, SSI?, or MICROWIRE?
■ External Memory Interface (EMI)
– 8- or 16-bit data, up to 24-bit addressing
– Static Async modes for LQFP128
– Additional burst synchronous modes for LFBGA144
■ Up to 80 I/O pins (muxed with interfaces)
■ 16-bit standard timers (TIM)
– 4 timers each with 2 input capture, 2 output compare, PWM and pulse count modes
■ 3-Phase induction motor controller (IMC)
■ JTAG interface with boundary scan
■ Embedded trace module (ARM ETM9)
电路图：
STR9英文.pdf
(1.16 MB, 下载次数: 10)
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发表于 2013-5-8 10:00:51
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