赛普拉斯超低功耗物联网开发板CY8CKIT-062-BLE上手

Charlie-356656

开发板配置（此板无UDB、USB资源,可通过开关SW6切换至为外部mcu编程，PSOC Creator IDE对PSOC6生成的API与PSOC5、PSOC4不同，如正面的GPIO控制）


开发板资料下载地址
https://www.cypress.com/documentation/development-kitsboards/psoc-6-ble-pioneer-kit
Psoc6 Cy8c63封装
封装1：104-MCSP, 3.8x5x0.65 mm height with 0.35-mm pitch
封装2：116-BGA, 5.2x6.4x0.5 mm height with 0.5-mm pitch
PSOC Creator4.2 IDE项目界面


核1：100MHZ CM0P 控制Pin_3 输出间隔300ms的高电平与低电平
核2：100MHZ CM4控制Pin_0 输出间隔300ms的高电平与低电平、启动PWM输出。
// Main_cm0p.c
int main(void)
{
__enable_irq(); /* Enable global interrupts. */
/* Enable CM4.CY_CORTEX_M4_APPL_ADDR must be updated if CM4 memory layout is changed. */
Cy_SysEnableCM4(CY_CORTEX_M4_APPL_ADDR);
/* Place your initialization/startup code here (e.g. MyInst_Start()) */
for(;;)
{
/* Place your application code here. */
Cy_GPIO_Write(Pin_3_PORT,Pin_3_NUM,0);
CyDelay(300);
Cy_GPIO_Write(Pin_3_PORT,Pin_3_NUM,1);
CyDelay(300);
}
}
// Main_cm4.c
int main(void)
{
__enable_irq(); /* Enable global interrupts. */
/* Place your initialization/startup code here (e.g. MyInst_Start()) */
PWM_1_Start();
for(;;)
{
/* Place your application code here. */
Cy_GPIO_Write(Pin_1_PORT,Pin_1_NUM,0);
CyDelay(300);
Cy_GPIO_Write(Pin_1_PORT,Pin_1_NUM,1);
CyDelay(300);
}
}
下载程序界面(貌似选择任意一个都一样)

时钟设置：
Fast Clock:This clock is used for the CM4 and associated AHB-Lite bus infrastructure.
SLOW Clock:This clock is used for the CM0+ CPU,Datawire and CRYPTO components and the associated CPUSS slow infrastructure.