VERILOG-A的一个PPT

caroline11

很不错的  verilog- A
High-level language for compact modeling is long overdue
Verilog-A is becoming the standard zAnalog-only subset of Verilog-AMS
zCompact modeling extensions in LRM 2.2Remaining steps:
zCompact model developers need to become comfortable
zCompilers must generate fast and reliable code